What is planarization process?

Chemical mechanical polishing or planarization is a process of smoothing surfaces with the combination of chemical and mechanical forces. It can be thought of as a hybrid of chemical etching and free abrasive polishing.

What is planarization in semiconductor?

Planarization is the process of increasing the flatness or planarity of the surface of a semiconductor wafer through various methods known as planarization techniques. This series of material growth, deposition, and removal steps decreases the flatness or planarity of the wafer surface.

What are the 2 ways to stop the CMP process?

The wafers are placed face-down on a rotating pad on which the slurry is dispensed. Copper CMP typically requires at least two steps [19,125]. The first step is Cu removal, stopping on the barrier layer, and the second step is the barrier removal, stopping on the dielectric.

What is the purpose of CMP process?

CMP is a standard manufacturing process practiced at the semiconductor industry to fabricate integrated circuits and memory disks. When the purpose is to remove surface materials, it is referred to as chemical-mechanical polishing.

Why is chemical mechanical polishing used for planarization?

Compared with other planarization techniques, the Chemical Mechanical Polishing (CMP) process produces excellent local and global planarization at low cost. It is thus widely adopted for planarizing inter-level dielectric (silicon dioxide) layers.

How is planarization used in the film process?

Planarization modeling is used to map optimal parameters for layer thickness. Modeling permits the process engineer to design a parameter set that eliminates the common problems associated with wide excursions in film thicknesses over etched steps.

How is the planarization of a graph performed?

Planarization may be performed by using any method to find a drawing (with crossings) for the given graph, and then replacing each crossing point by a new artificial vertex, causing each crossed edge to be subdivided into a path. The original graph will be represented as a immersion minor of its planarization.

How is planarization used in wafer layer modeling?

Planarization is a flattening or smoothing out of the wafer surface topography by 1) filling in the deep “trench” areas; 2) etching the top surface of an etched structure; 3) filling in via holes; or 4) some combination of these. Planarization modeling is used to map optimal parameters for layer thickness.